TASKers: A Whole-System Generator for Benchmarking Real-Time-System Analyses

Implementation-based benchmarking of timing and schedulability analyses requires system code that can be executed on real hardware and has defined properties, for example, known worst-case execution times (WCETs) of tasks. Traditional approaches for creating benchmarks with such characteristics often result in implementations that do not resemble real-world systems, either due to work only being simulated by means of busy waiting, or because tasks have no control-flow dependencies between each other. In this paper, we address this problem with TASKers, a generator that constructs realistic benchmark systems with predefined properties. To achieve this, TASKers composes patterns of real-world programs to generate tasks that produce known outputs and exhibit preconfigured WCETs when being executed with certain inputs. Using this knowledge during the generation process, TASKers is able to specifically introduce inter-task control-flow dependencies by mapping the output of one task to the input of another

Worst-Case Energy-Consumption Analysis by Microarchitecture-Aware Timing Analysis for Device-Driven Cyber-Physical Systems

Many energy-constrained cyber-physical systems require both timeliness and the execution of tasks within given energy budgets. That is, besides knowledge on worst-case execution time (WCET), the worst-case energy consumption (WCEC) of operations is essential. Unfortunately, WCET analysis approaches are not directly applicable for deriving WCEC bounds in device-driven cyber-physical systems: For example, a single memory operation can lead to a significant power-consumption increase when thereby switching on a device (e.g. transceiver, actuator) in the embedded system. However, as we demonstrate in this paper, existing approaches from microarchitecture-aware timing analysis (i.e. considering cache and pipeline effects) are beneficial for determining WCEC bounds: We extended our framework on whole-system analysis with microarchitecture-aware timing modeling to precisely account for the execution time that devices are kept (in)active. Our evaluations based on a benchmark generator, which is able to output benchmarks with known baselines (i.e. actual WCET and actual WCEC), and an ARM Cortex-M4 platform validate that the approach significantly reduces analysis pessimism in whole-system WCEC analyses

Entanglement Stabilization using Parity Detection and Real-Time Feedback in Superconducting Circuits

Fault tolerant quantum computing relies on the ability to detect and correct errors, which in quantum error correction codes is typically achieved by projectively measuring multi-qubit parity operators and by conditioning operations on the observed error syndromes. Here, we experimentally demonstrate the use of an ancillary qubit to repeatedly measure the $ZZ$ and $XX$ parity operators of two data qubits and to thereby project their joint state into the respective parity subspaces. By applying feedback operations conditioned on the outcomes of individual parity measurements, we demonstrate the real-time stabilization of a Bell state with a fidelity of $F\approx 74\%$ in up to 12 cycles of the feedback loop. We also perform the protocol using Pauli frame updating and, in contrast to the case of real-time stabilization, observe a steady decrease in fidelity from cycle to cycle. The ability to stabilize parity over multiple feedback rounds with no reduction in fidelity provides strong evidence for the feasibility of executing stabilizer codes on timescales much longer than the intrinsic coherence times of the constituent qubits.Comment: 12 pages, 10 figures. Update: Fig. 5 correcte

Ghost in the Ising machine

Coupled nonlinear systems have promise for parallel computing architectures. En route to realizing complex networks for Ising machines, we report an experimental and theoretical study of two coupled parametric resonators (parametrons). The coupling severely impacts the bifurcation topology and the number of available solutions of the system; in part of the stability diagram, we can access fewer solutions than expected. When applying noise to probe the stability of the states, we find that the switching rates and the phase-space trajectories of the system depend on the detuning in surprising ways. We present a theoretical framework that heralds the existence of 'ghost bifurcations'. These bifurcations involve only unstable solutions and lead to avoided zones in phase space. The emergence of such ghost bifurcations is an important feature of parametron networks that can influence their application for parallel logic operations

Rapid flipping of parametric phase states

Since the invention of the solid-state transistor, the overwhelming majority of computers followed the von Neumann architecture that strictly separates logic operations and memory. Today, there is a revived interest in alternative computation models accompanied by the necessity to develop corresponding hardware architectures. The Ising machine, for example, is a variant of the celebrated Hopfield network based on the Ising model. It can be realized with artifcial spins such as the `parametron' that arises in driven nonlinear resonators. The parametron encodes binary information in the phase state of its oscillation. It enables, in principle, logic operations without energy transfer and the corresponding speed limitations. In this work, we experimentally demonstrate flipping of parametron phase states on a timescale of an oscillation period, much faster than the ringdown time \tau that is often (erroneously) deemed a fundamental limit for resonator operations. Our work establishes a new paradigm for resonator-based logic architectures.Comment: 6 pages, 3 figure

GHz nanomechanical resonator in an ultraclean suspended graphene p-n junction

We demonstrate high-frequency mechanical resonators in ballistic graphene p-n junctions. Fully suspended graphene devices with two bottom gates exhibit ballistic bipolar behavior after current annealing. We determine the graphene mass density and built-in tension for different current annealing steps by comparing the measured mechanical resonant response to a simplified membrane model. We consistently find that after the last annealing step the mass density compares well with the expected density of pure graphene. In a graphene membrane with high built-in tension, but still of macroscopic size with dimensions 3 $\times$ 1 $\mu m^{2}$, a record resonance frequency of 1.17 GHz is observed after the final current annealing step. We further compare the resonance response measured in the unipolar with the one in the bipolar regime. Remarkably, the resonant signals are strongly enhanced in the bipolar regime. This enhancement is caused in part by the Fabry-Perot resonances that appear in the bipolar regime and possibly also by the photothermoelectric effect that can be very pronounced in graphene p-n junctions under microwave irradiation.Comment: 16 pages, 4 figures, 1 tabl

Band bending inversion in Bi2_2Se3_3 nanostructures

Shubnikov-de-Haas oscillations were studied under high magnetic field in Bi$_2$Se$_3$ nanostructures grown by Chemical Vapor Transport, for different bulk carrier densities ranging from $3\times10^{19}\text{cm}^{-3}$ to $6\times10^{17}\text{cm}^{-3}$. The contribution of topological surface states to electrical transport can be identified and separated from bulk carriers and massive two-dimensional electron gas. Band bending is investigated, and a crossover from upward to downward band bending is found at low bulk density, as a result of a competition between bulk and interface doping. These results highlight the need to control electrical doping both in the bulk and at interfaces in order to study only topological surface states.Comment: 6 pages, 4 figure

Neverlast: Towards the Design and Implementation of the NVM-based Everlasting Operating System

Novel non-volatile memory (NVM) technologies allow for the efficient implementation of \u27\u27intermittently-powered\u27\u27 smart dust and edge computing systems in a previously unfamiliar way. Operating with rough environmental conditions where power-supply failures occur often requires adjustments to all parts of the system. This leads to an inevitable trade-off in the design of operating systems -- the overhead of persisting the achieved computation progress over power failures is detrimental to the possible amount of progress with the available energy budgets. It is, therefore, crucial to minimize the overhead of ensuring persistence. This paper presents the case that persistence should be provided as an operating-system service to achieve everlasting operating capabilities. Triggered by power-failure interrupts, an implicit persistence service for the processor status of a process preserves progress on the CPU-instruction level. This interrupt only triggers if necessary so that no power-state polling is needed. We outline architectures for everlasting systems and discuss their benefits and drawbacks compared to existing approaches. Thereby, the operating system provides persistence as a service at run-time to the application, with minimal overhead. Our approach enables the separation of the application from energy-supply state estimation, as well as state-preserving logic for software and hardware components